The present invention is related to a system and method for transmitting commands to peripheral devices.
A common function of electronic systems is the controlling, by a CPU, of peripheral devices, such as graphics, disk drive and network controllers. Such devices often include storage locations of 1 or more bits that must be set to a 1 or 0 as part of the process of being controlled by a CPU. Many peripheral devices provide storage locations (hereinafter referred to as registers) meant to be directly accessible by a CPU at one or more addresses on the bus to which these peripheral devices are coupled. To control such devices, a CPU performs a write operation to set the one or more bits of a register within the peripheral device to some desired value. Other peripheral devices provide a queue of storage locations (hereinafter referred to as a command buffer) into which a CPU writes multiple values, at least some of which represent commands to be executed by the peripheral or values to be written to registers within the peripheral. Such buffers are typically implemented as a set or storage cells within the peripheral device, itself, or a storage device coupled to the peripheral device.
In many electronic systems, having a CPU directly control a peripheral device by writing to registers or a command buffer can degrade overall system performance. This is often attributable to delays either within the peripheral device, itself, or caused by the manner in which the peripheral device is coupled to a CPU. A CPU and the means by which a CPU is connected to the peripheral device may be faster at transmitting a value being written to a register or command buffer of a peripheral device than the register or command buffer is at storing the value. The means through which a CPU must transmit a value to the peripheral device may constrain the speed at which values may be transmitted, either due to design limitations or because the same means is also being used in the unrelated transfer of other values. Furthermore, it may be the case that a series of values needs to be transmitted to the peripheral device, but the writing of one or more of the values must be delayed until the peripheral device has finished acting on a previously transmitted value.
Many current day electronic systems have multiple busses by which values are transferred between devices within the system, and often, the fastest of these busses is the one that exists between a CPU and system memory in order to ensure optimal performance. Therefore, in such systems, a CPU is able to transmit a value to system memory far faster than it is able to transmit the same value to a peripheral device.
A system and method for controlling peripheral devices wherein at least one command is written to a location in a system memory and a write pointer is advanced. A peripheral device reads the at least one command from that location in memory, increments a read pointer and executes the at least one command.